1. Field of the Invention
The present invention relates to a semiconductor memory device and a method of manufacturing the same and, more particularly, to a semiconductor memory device of a so-called FLOTOX (Floating Gate Tunnel Oxide) type having a structure in which a tunnel region having a thin insulating film is locally formed between the drain and floating gate of a memory transistor and a method of manufacturing the same.
2. Description of the Related Art
In a semiconductor memory device, e.g., an E.sup.2 PROM, a insulating film consisting of a silicon oxide film is formed on a surface of a silicon semiconductor substrate, and a thin film portion is locally formed as a tunnel oxide film on the insulating film. A floating gate is formed on this thin tunnel oxide film. In addition, a control gate is formed on the floating gate through a silicon oxide film serving as an insulating film.
In a semiconductor memory device arranged into such a FLOTOX type device, demands have arisen for an improvement in endurance (the number of times of writing and erasing) characteristics and in breakdown characteristics of a tunnel insulating film. For example, U.S. Pat. No. 4,490,900 discloses a means to improve such characteristics, i.e., discloses a technique of forming a three-layer structure consisting of a tunnel oxide film, a nitrided oxide film, and an oxide film.
After experiments with an FLOTOX type E.sup.2 PROM having the above-described structure and examination of the results, the present inventors obtained the following conclusion. A tunnel oxide film generally has a thickness as small as 50 to 150 .ANG.. For this reason, if the concentration of an impurity, e.g., phosphorus, of a floating gate on the tunnel oxide film is excessively high, phosphorus is introduced into the tunnel insulating film. It was found, therefore, that the withstand voltage of the tunnel insulating film with respect to electron injection was lowered, and the number of times of rewriting was reduced due to breakdown of the tunnel insulating film. In addition, variations in rewriting amount occurred.
In contrast to this, if the concentration of phosphorus of the floating gate is decreased, introduction of the impurity into the tunnel insulating film is suppressed, and the above problem may be solved. However, in the above-described conventional technique, the impurity concentration of the floating gate is not designed to be low, but is set to be high instead due to the following reasons.
In E.sup.2 PROMs, a polyoxide film obtained by oxidizing a floating gate is generally used as an insulating film between the floating gate and a control gate. If the phosphorus concentration of the floating gate is low when it is oxidized, the asperity of a surface of the floating gate upon oxidation is increased. In addition, a polyoxide film at an edge portion of the floating gate is made thinner, and the edge portion is made further acute, thereby decreasing a withstand voltage between the floating gate and the control gate. The edge portion is especially susceptible to such influences, and hence a high voltage for rewriting the E.sup.2 PROM cannot be applied.
In addition, if an oxidation temperature for forming a polyoxide film on the floating gate is increased, the withstand voltage tends to be increased. However, redistribution of an impurity of the tunnel insulating film in a transistor region occurs, and a problem is posed in terms of a high packing density for microfabrication.
According to the method disclosed in U.S. Pat. No. 4,490,900, when an oxide film is nitrided, forming a three-layer tunnel insulating layer, a part of the memory transistor and the oxide film surrounding the memory transistor (i.e., the gate oxide film of the memory transistor and the gate oxide film of the select transistor) are also inevitably nitrided. As a result, carrier mobility is lowered by coulomb dispersion which is caused possibly by a fixed charge being introduced into the gate oxide film, and thus the operation speed of the fabricated semiconductor device is lowered.